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Dekodovanje kodova sa malom gustinom provera parnosti u prisustvu grešaka u logičkim kolima

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2017
Disertacija.pdf (6.509Mb)
IzvestajKomisije9457.pdf (1.065Mb)
Author
Brkić, Srđan
Mentor
Ivaniš, Predrag N.
Committee members
Smiljanić, Aleksandra
Vasić, Bane
Saranovac, Lazar
Đorđević, Goran
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Abstract
Sve ve´ca integracija poluprovodniˇckih tehnologija, varijacije nastale usled nesavršenosti procesa proizvodnje, kao zahtevi za smanjenjem napona napajanja cˇine elektronske ured¯aje inherentno nepouzdanim. Agresivno skaliranje napona smanjuje otpornost na šum i dovodi do nepouzdanog rada ured¯aja. Široko je prihvac´ena paradigma prema kojoj se naredne generacije digitalnih elektronskih ured¯aja moraju opremiti logikom za korekciju hardverskih grešaka...
Due to huge density integration increase, lower supply voltages, and variations in technological process, complementary metal-oxide-semiconductor (CMOS) and emerging nanoelectronic devices are inherently unreliable. Moreover, the demands for energy efficiency require reduction of energy consumption by several orders of magnitude, which can be done only by aggressive supply voltage scaling. Consequently, the signal levels are much lower and closer to the noise level, which reduces the component noise immunity and leads to unreliable behavior. It is widely accepted that future generations of circuits and systems must be designed to deal with unreliable components...
Faculty:
Универзитет у Београду, Електротехнички факултет
Date:
12-04-2017
[ Google Scholar ]
Handle
https://hdl.handle.net/21.15107/rcub_nardus_8228
URI
https://nardus.mpn.gov.rs/handle/123456789/8228
http://eteze.bg.ac.rs/application/showtheses?thesesId=4980
https://fedorabg.bg.ac.rs/fedora/get/o:15625/bdef:Content/download
http://vbs.rs/scripts/cobiss?command=DISPLAY&base=70036&RID=48972303

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