Паралелни меморијски подсистеми за примену у обради слике и видеа у мобилним уређејима
Parallel memory subsystems for image and video processing on mobile devices
Author
Jakovljević, Radomir M.
Mentor
Milićev, Dragan.Committee members
Jovanović, ZoranStarčević, Dušan
Saranovac, Lazar

Tomašević, Milo
Metadata
Show full item recordAbstract
Добро је познато да уско грло векторских процесора за дигиталну обраду слике и видеа, које ограничава њихове перформансе, јесте приступ пикселима у меморији. Ова теза предлаже ново решење паралелног меморијског подсистема на чипу, што укључује нове функционалности и одговарајућу архитектуру, које омогућава већу брзину обраде на оваквим процесорима и троши мање енергије при обради истог броја пиксела од најефикаснијих постојећих подсистема.
Accessing pixels in memory is a well-known performance bottleneck of SIMD
(Single-Instruction Multiple-Data) processors for image and video processing. This
thesis proposes a new solution of a parallel on-chip memory subsystem, including
new functionalities and an enabling architecture, which enables a higher processing
throughput and consumes less energy per processed pixel than the other state-ofthe-
art subsystems.
The thesis first presents new functionalities of a parallel memory subsystem, i.e.
new block and row access modes, which are better adjusted to the needs of image
and video processing algorithms than the functionalities of existing parallel memory
subsystems. The new access modes significantly reduce the number of on-chip
memory read and write accesses, and thereby accelerate the imaging/video kernels
that are in focus of this work: sub-pixel block-matching motion estimation, pixel interpolation
for motion compensation, and spatial window-based filtering. The main
idea of... the new access modes is to exploit spatial overlaps of blocks/rows accessed in
the memory subsystem, which are known at the subsystem design-time, and merge
multiple accesses into a single one by accessing somewhat more pixels at a time than
with other parallel memories. To avoid the need for a wider, and therefore more
costly SIMD datapath, this work proposes new memory read operations that split
all pixels accessed at a time into multiple SIMD-wide blocks/rows, in a convenient
way for further processing. In addition to a higher processing throughput, the new
access modes reduce the energy consumed by the parallel memory subsystem for the
same amount of processed pixels, by reducing the number of repeated accesses of
the same pixels...